TSMC OIP Virtual Design Environment Brings Design to the Cloud
Celebrating the 10th anniversary of the Open Innovation Platform™, TSMC unveiled its Virtual Design Environment (VDE) in the cloud at the 2018 OIP Ecosystem Forum. This innovative service provides a complete SoC design environment for our customers to design securely in the cloud, helping customers improve productivity and shorten time-to-market by leveraging the power and easy scalability of cloud computing.
Power and Flexibility of the Cloud
The OIP VDE is the result of collaboration with TSMC design ecosystem partners and leading cloud providers to deliver a complete design environment in the cloud. Both digital (RTL to GDSII) and custom (Schematic Capture to GDSII) design flows have been validated in the cloud, along with OIP design collateral—including process technology files, PDKs, foundation IP, and reference flows.
TSMC itself harnessed the power of the cloud with its development of 5nm SRAM, a key foundation IP for our leading-edge technology. The elasticity of cloud computing allowed us to leverage as many as 75,000 CPU cores during peak demand for computing power, while relying on in-house CPUs during troughs. Using the cloud not only allowed TSMC to accelerate its 5nm SRAM design and characterization, it also eliminated the need for purchasing additional in-house CPUs that would stand idle during off-peak times.
In addition, utilizing cloud resources can help designs achieve greater quality with higher simulation coverage that would not be possible with in-house CPU limitations, as well as push for better power, performance, and area with more optimization runs. On top of these benefits, a cloud-based system also allows a company’s design teams around the world to collaborate in a single design environment, eliminating the need for data transfer and sync-up, and enabling better coordination.
Collaboration to Lower Entry Barriers
TSMC’s OIP VDE is enabled through collaboration with the inaugural members of our Cloud Alliance partners: Amazon Web Services (AWS), Cadence, Microsoft Azure, and Synopsys. Behind the scenes, we have worked with them to make sure that adoption is as smooth as possible with certification for tool settings, interactive responsiveness, CPU and memory configuration, and license management.
To ensure low barriers to entry and high technical support levels, Cadence and Synopsys act as the focal point helping customers to set up VDE and provide first line support with virtual storefronts. Additional details on Cadence’s deployment of VDE are available at www.cadence.com/go/cadencecloud2. For more information on the Synopsys Cloud Solution, please visit www.synopsys.com/cloud.
Flex Logix Technologies announced that MorningCore Technology, a subsidiary of China telecommunications giant Datang, is licensing EFLX®4K eFPGA for TSMC’s 12nm FinFET Compact technology (12FFC) process and the EFLX Compiler for programming the eFPGA. The application involves wireless communications. MorningCore is also licensing additional seats of the EFLX Compiler so some of their customers can program the chip with eFPGA themselves.
M31 Technology announced that it has developed a diversified TSMC 28HPC + Ultra-Low Power (ULL) Memory Compiler IP portfolio that provides customers with more flexibility in their SoC design.
Rambus announced the tapeout of its GDDR6 PHY on TSMC 7nm FinFET process technology and is available from Rambus for licensing. Leveraging almost 30 years of high-speed interface design expertise and using advanced process technology, Rambus has successfully taped out a GDDR6 PHY IP on TSMC 7nm process technology.
Silicon Creations announced a wide variety of IP offerings in TSMC’s 5FF, 7FF, 7FF+, 12FFC, and 22ULP/ULL process nodes, designed to support customer’s SoC timing demands.
Silicon Creations announced that its phase-locked loop (PLLs) technology has been deployed in Canaan Creative’s 7nm ASIC chip.
Synopsys announced a collaboration with TSMC to develop a broad portfolio of DesignWare® Interface IP, Logic Libraries and Embedded Memories for the TSMC 7nm FinFET Plus process. Multiple customer tape-outs in the 7nm Plus using Synopsys DesignWare IP demonstrates the high quality and robustness of the IP for TSMC's advanced FinFET process. The combination of TSMC's 7nm FinFET Plus process and Synopsys' DesignWare IP helps designers develop the next wave of compact, high-density, low-power mobile and data center system-on-chips (SoCs) with significantly less risk while accelerating their time-to-market.
Synopsys delivers automotive-grade DesignWare® Controller and PHY IP for TSMC's 7nm FinFET process. The DesignWare LPDDR4x, MIPI CSI-2 and D-PHY, PCI Express® 4.0, and security IP implement advanced automotive design rules for TSMC 7nm process to meet the stringent reliability and operation requirements of ADAS and autonomous driving system-on-chips (SoCs).
Visit TSMC at DAC, June 2-6 in Las Vegas, Booth 326.
ANSYS announced TSMC certified ANSYS solutions for the 7nm FinFET Plus process node with extreme ultraviolet lithography (EUV) technology and validated the reference flow for the latest Integrated Fan-Out with Memory on Substrate (InFO_MS) advanced packaging technology. The certifications and validations are vital for fabless semiconductor companies that require their simulation tools to pass rigorous testing and validation for new process nodes and packaging technologies.
ANSYS RedHawk™ and ANSYS® Totem™ are certified for TSMC 7nm FinFET Plus process technology that provides EUV-enabled features. Certification for 7nm FinFET Plus includes extraction, power integrity and reliability, signal electromigration (EM) and thermal reliability analysis.
ANSYS, Customers of TSMC and ANSYS can accelerate the production of automotive design features through the Automotive Reliability Solution Guide 2.0, an outline of proven workflows to support customers' intellectual property (IP), chip and package development for TSMC 7nm FinFET process technology. Based on TSMC and ANSYS collaboration on reliability solutions in ANSYS® RedHawk™, ANSYS® RedHawk-CTA™, ANSYS® Totem™ and ANSYS® Pathfinder-Static™, the expanded guide empowers customers to develop more efficient and robust chips for the next generation of smart automobiles.
Cadence announced the expansion of the Cadence® Cloud portfolio by providing customers with secure access to TSMC’s new Open Innovation Platform Virtual Design Environment (OIP VDE) to speed system-on-chip (SoC) design. Customers using the tapeout-proven Cadence Cloud-Hosted Design Solution on Microsoft Azure or Amazon Web Services (AWS) can efficiently utilize Cadence tools and flows and TSMC design collateral.
Cadence announced that its digital tools and advanced IC packaging solutions support the new TSMC InFO_MS (InFO with Memory on Substrate) packaging technology. Support for this TSMC packaging technology enables mutual customers to create new, complex chips using 3D stacking techniques to bring innovative new products to market much faster than ever before.
Lumerical, Inc. announces that it has joined TSMC Open Innovation Platform® EDA Alliance enabling photonic simulation. Photonics has great potential in such applications as telecommunications, data center, biomedical, autonomous vehicles, and IOT. Well integrated simulation tools are required to fulfill this potential. The new partnership addresses this domain through TSMC and Lumerical providing customer enablement of Lumerical’s component simulation tools (FDTD, DEVICE, and MODE) and INTERCONNECT photonic circuit simulator.
Mentor announced certification for TSMC’s 7nm FinFET Plus and the latest version of 5nm FinFET processes for its Mentor Calibre® nmPlatform and Analog FastSPICE™ (AFS™) Platforms. In addition, Mentor continues to expand features of both the Xpedition™ Package Designer and Xpedition Substrate Integrator products supporting TSMC’s advanced packaging offerings.
Synopsys announced that TSMC has certified both the Synopsys Digital and Custom Design Platforms for the latest version of its most advanced, extreme-ultra-violate (EUV)-based, 5nm process technology. This certification is the result of an extensive, multi-year collaboration to deliver an optimized design solution that speeds the path to next-generation designs.
Synopsys announced it has collaborated with TSMC and leading cloud providers Amazon Web Services (AWS) and Microsoft Azure, to provide a streamlined cloud-based IC design environment on the Synopsys Cloud Solution. The Synopsys Cloud Solution provides optimized, secure infrastructure and services to enable IC design and verification teams to take full advantage of the benefits of the cloud.
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