Building Value with TSMC’s Pure-Play Foundry Model

Maria Marced
President TSMC Europe

Over the last three months, we’ve seen acceleration in the worldwide 5G development, which is speeding up the introduction of new smartphones and other innovative 5G applications. The reliable, high-bandwidth data communication infrastructure offered by 5G is sparking innovations across all of our technology platforms, from mobile, IoT, and automotive to high-performance computing and AI. To capture these many opportunities, TSMC will provide the most advanced process technology, most comprehensive ecosystem and best design collateral readiness.

The right capacity at the right time is critical to your product success. With worldwide 5G development gaining momentum, TSMC now expects our 2019 capital spending to exceed the US$10-11 billion estimate we gave at the beginning of this year as we support our customers with more capacity for their leading-edge designs.

The progress of our advanced technologies is well on track to meet your innovation requirements. Our N7 process has been adopted in wide spectrum of products across mobile, HPC and IoT applications, while our N7+, the industry’s first commercially available EUV process technology, has already entered volume production, and our customer’s end-products using N7+ will hit the market in high volume soon. Our N6 delivers an additional 18% logic density gain over N7 by reducing mask layers with EUV lithography capabilities gained from N7+. Providing a clear migration path for our N7 customers, TSMC’s N6 allows them to reuse the comprehensive N7 design ecosystem. It’s ideal for a broad array of applications ranging from high-to-mid end mobile, consumer applications, AI, networking, 5G infrastructure, GPU, and high-performance computing. The risk production of our N6 is scheduled to begin in first quarter 2020 with volume production starting before the end of 2020. Our industry-leading 5nm solution, which provides the best density, performance, power, and transistor technology, entered risk production in first quarter 2019 with customer tape-outs underway, and we are well on the way towards volume production in the first half of 2020. Looking further ahead, technology development for our N3 is going well with early customers engaged, and we continue to work with our customers to provide a solution that will best satisfy your future innovation requirements. Just as TSMC’s N5 is a full-node advance from N7, our N3 will be another full-node advance from N5.

At the same time, our advanced packaging solutions, with follow-on generations of InFO (Integrated Fan-Out) and CoWoS® (Chip on Wafer on Substrate), continue to lead the industry in providing the most advanced system-level integration solutions. Our TSMC-SoIC™ (System-on-Integrated Chips) solution, a clear industry-leading 3D-IC packaging solution, has gained incredible responses from our customers and partners. Ecosystem partners including Ansys, Cadence, Mentor and Synopsys have worked with us to certify their design solutions and tools for this advanced integration, smoothing the path for adoption in our customers’ products.

We jointly develop design solutions with our ecosystem partners on top of TSMC’s advanced technologies through OIP collaboration. With over 20 years’ experience in reference flow development, TSMC has a long history of working with our ecosystem partners, and those partners know how to work effectively with us to unleash our customers’ silicon innovation in a cost-effective way and to realize faster time-to-market. We have continued to work with our ecosystem partners to expand our libraries and silicon IP portfolio to more than 21,000 items. The OIP Virtual Design Environment (OIP VDE) is an incredible addition to our OIP program, which was introduced last year. It has received overwhelmingly positive feedback from customers of all sizes for helping them realize their silicon designs and creations in TSMC’s leading-edge technologies in an efficient, cost-effective and secure fashion. With the foundry segment’s largest design support ecosystem, unparalleled capability for joint methodology development with partners and customers, along with the industry’s most comprehensive IP portfolio, and design tool assurance, TSMC has the deepest and closest collaboration with our ecosystem partners to ensure the readiness of design tools and IP for each major node, and the maturity of technologies for customer’s silicon innovation.

Despite the softer overall global economic condition in the past several months, all signs show that we have passed the bottom of the cycle of our business, thanks to close collaboration with our customers and partners. Moving into the third quarter, we’re seeing new product launches of premium smartphones, acceleration of 5G developments and increasing adoption of HPC applications, which promise to be major factors driving industry growth with more opportunities. We keep striving to strengthen our technology leadership, manufacturing excellence, and customers’ trust, which are TSMC’s trinity of strengths enabling us to best satisfy your requirements. With the most useful and robust technology offerings across both advanced and specialty technologies, we are working diligently to unleash your innovations, to capture the market opportunities and to grow together with you for years to come.